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專任教師行政人員碩士班學生

林尚亭 (Sun-Ting Lin)副教授

個人學歷

國立交通大學電子博士

研究專長

IC設計、系統晶片設計

聯絡電話

(07)7172930 分機 7912

電子信箱

stl@nknu.edu.tw

實  驗  室

VLSI實驗室|分機:7952
電路模擬實驗室|分機:

互動時段

週二:12:30~14:30

學經歷(Click)

學歷
畢業學校 主修學門系所 學位
國立交通大學 電子工程研究所 博士
美國俄亥俄州立大學 電機工程研究所 碩士
國立交通大學 電子工程系 學士
經歷
服務機關 服務部門/系所 職稱 起訖年月
中華電信研究所 參與Telcordia公司合作案   2003/11 至 2004/05
中華電信研究所 寬頻網路研究室  助理研究員 1993/01 至 2006/07
美國俄亥俄州立大學 電機工程研究所 研究助理 1991/01 至 1992/12

學術榮譽(Click)

年度 項目
90 The 2001 APCC Paper Award:for the paper entitled "Precursor ISI-Free Frame Synchronization for DMT VDSL System" at 7th Asia-Pacific Conference on Communication in Tokyo, Japan.(Base Paper Award)

期刊論文(Click)

項次 論文
1. S.-T. Lin, T.-H. Wang, S.-S. Lin and Y.-B. Li, “CORDIC algorithm for FPGA implementation,” Lecture Notes in Electrical Engineering, vol. 293, pp. 57–62, Apr. 2014. (EI)
2. S.-T. Lin and S.-S. Lin, “A high-efficient distance spectrum algorithm for turbo codes,” Communications in Computer and Information Science, vol. 391, pp. 477–486, 2013. (EI)
3. S.-T. Lin, S.-S. Lin, and J.-A. Lai, “A Low-Complexity Stopping Criterion for Turbo Decoding Using Forward State Metrics at a Single Time Instant,” IEICE Transaction on Communication, Vol. E96-B, No. 03, pp. 722-729, Mar. 2013. (SCIE, IF=0.254)
4. S.-T. Lin and C.-H. Wei, “Throughput Performance of DMT-based VDSL System at High Sampling Rates,” Journal of the Chinese Institute of Engineers, Vol. 30, No. 6, pp. 1109-1113 Sep. 2007. (SCIE, IF=0.295)
5. S.-T. Lin and C.-H. Chang, “SRTS Application in High Speed Transmission System,” Kaohsiung Normal University Journal (Science and Technology), Vol. 22, pp. 63-70, June, 2007.
6. S.-T. Lin, “DMT Technology and its Applications,” Kaohsiung Normal University Journal (Science and Technology), Vol. 24, pp. 1-10, June, 2008.
7. S.-T. Lin, S.-S. Lin, and C.-W. Chiang, “On the MAP-Level Delay Reduction of Turbo Decoding,” Advanced Science Letters, to be published. (SCIE, IF=1.253)
8. S.-T. Lin and C. H. Wei, "Iterative ISI cancellation for DMT-based VDSL systems," International Journal of Electral Engineering, vol. 12, no. 4, pp.365-368, Dec. 2005.
9. S.-T. Lin and C. H. Wei, "Precursor ISI-free frame synchronization for DMT VDSL system," IEICE Trans. Comm., vol. 85-B, no. 8, pp. 1447-1454,Aug. 2002. (SCI)
10. S.-T. Lin, "SDH network wander measurement," TL Technical Journal, 1999. (in Chinese)
11. S.-S. Lin and S.-T. Lin, "Chip design og virtual tributary pointer adjustmenter for ADM150 system," TL Technical Journal , vol. 27, no. 1, pp. 31-41, Feb. 1997.(in Chinese)

研討會論文(Click)

項次 論文
1. S.-T. Lin, T.-H. Wang, S.-S. Lin, and Y.-B. Li, “CORDIC Algorithm for FPGA Implementation,” The 2nd International Conference on Intelligent Technologies and Engineering System, Dec. 2013
2. S.-S. Lin, S.-H. Lin and S.-T. Lin, “GPU-based Parallelized Method for Calculating the CRC value of the LTE Turbo Codes,” in Proc. 2015 National Symposium on Telecommunications (NST 2015), Taoyuan, Taiwan, Nov. 26–27, 2015.
3. S.-S. Lin, M.-Z. Huang and S.-T. Lin, “Accelerating Strategy Study for the Turbo Code Simulation Using Intel’s Multicore and Many-core Platform,” in Proc. 2015 National Symposium on Telecommunications (NST 2015), Taoyuan, Taiwan, Nov. 26–27, 2015.
4. S.-T. Lin and C.-H. Chang, “Synchronous Parameters for Non-Compressed HDTV Signal Transmission over SDH Network,” National Symposium on Telecommunications, Dec. 2008.
5. S.-T. Lin, “Apply Joint Uniform Companding Technology for Nonlinear Effects in OFDM Systems,” International Symposium on Microwave and Optical Technology, pp. 1129-1132, Dec. 2009.
6. S.-T. Lin and I.-C. Hwang, "Analysis of hybrid fibers in high bit rate optical transmission system" Proc. IEEE CLEO/Pacific Rim 2003. vol.1, pp. 213, Dec. 2003.
7. S.-T. Lin and C.-H. Wei, "Optimal channel capacity analysis for DMT VDSL system of various symbol rates," Proc. IEEE Globecom''01, San Antonio, U.S.A., pp.389-393, Nov. 2001.
8. S.-T. Lin and C.-H. Wei, "Precursor ISI-free frame synchronization for DMT VDSL system," Proc. APCC 2001, Tokyo, Japan, pp. 413-416, Sept. 2001.
9. S.-T. Lin, "Synchronization status meggage and its applications in SDH network," in Proc. 16th International Telecom. Symp., vol. II, PS III-2-3, pp. 215-222,sept. 1998.
10. S.-T. Lin, Y.-J. Cheng, G.-H. Huang, and S. Tengchen "Design and implementation of the clock recovery using SRTS technique for ATM system," in Proc. 7th VLSI Design/CAD Symp., B1-4, 119-122, Aug. 1996.
11. S.-T. Lin, S.-S. Lin and G.-H. Huang, "VLSPGA: VDSL libraries of SDH/SONET pattern generator and analysis," in Proc. 6th VLSI Design/CAD Symp., pp. 286-289, Aug. 1995.

專利著作(Click)

類別 專利名稱 國別 專利號碼 發明人 專利核准日期
新型 同步光纖網路指標處理器 中華民國 118714號 林壽煦、林尚亭、邱武志、吳吉原、謝文檳、李訓誠 85/11/21~97/5/21
新型 Stopping Methods for Iterative Signal Processing 美國 US8984377 B2 Shou-Sheu Lin, Je-An Lai, and Sun-Ting Lin 2015/03/17
新型 減少渦輪解碼延遲的方法參與裝置 中華民國 I 489791 林壽煦, 林尚亭, 江傳文 2015/06/21
新型 渦輪碼編碼之錯誤型樣估計方法 中華民國 I 533623 林壽煦, 林尚亭 2016/05/11
新型 渦輪碼交錯器的優化交錯序列產生方法及其交錯器 中華民國 I 572148 林壽煦,李育誠, 林尚亭 2017/02/21


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